ST to deny rivals FDSOI access

ST to deny rivals FDSOI access

LONDON – STMicroelectronics is considering plans to offer its fully depleted silicon on insulator (FDSOI) process to second-tier foundries United Microelectronics Corp. and SMIC.

This was revealed by Jean-Marc Chery, chief manufacturing and technology officer at STMicroelectronics NV, who also told EE Times that ST's agreement with Globalfoundries Inc. (Milpitas, Calif.) should provide enough capacity to satisfy initial demand but that it includes a clause that will deny some companies access to the 28-nm version of the process technology.

This was confirmation of something revealed by ST CEO Carlo Bozotti who told analysts at a one-day conference here on May 16 that "We now formally have a second source available to us and to a number of our competitors, but not all."

Chery said that with technology transfer agreements it was quite normal to have defined periods when the provider of the technology would continue to enjoy an advantage in the market. "We have been able to define a list of people at 28-nm who can have access to this technology," Chery told EE Times. When asked who would not be able to have access to 28-nm FDSOI, Chery said: "Not guys who compete [with ST] in chips for set-top box, home gateways and digital ASICs for networking." Chery declined to confirm or deny that Broadcom was a company that would not be given access to 28-nm FDSOI. "At the 14-nm node, the platform is completely open," Chery said.

The follow-on node to 28-nm FDSOI is 14-nm FDSOI, which is intended to compete with 16-nm and 14-nm FinFET processes from the major chipmakers, Intel, TSMC, Samsung and Globalfoundries.



Jean-Marc Chery, chief manufacturing and technology officer with STMicroelectronics.

The ultra-thin body and buried oxide (UTBB) FDSOI planar process is claimed to have advantages over other manufacturing process variants, such as bulk planar CMOS and FinFET CMOS in terms of trade-offs between performance, power consumption and manufacturability. One concern has been the cost and availability of the specialized SOI wafers but ST claims that the simple nature of the process compared with FinFETs makes the total cost of production advantageous. Following on from much initial work by IBM ST has pioneered the FDSOI process, although the most of the major foundries are working on the premise that bulk CMOS at 20-nm will be quickly followed by FinFET manufacturing at about 16- or 14-nm. Intel introduced the first FinFET process at 22-nm.

Some observers point to the apparent lack of interest in FDSOI amongst leading manufacturers including Intel, TSMC and Samsung and say this casts doubt on the viability of the process and its ability to developing a supporting ecosystem.

Chery said that FDSOI is an incremental innovation from bulk CMOS. "We can reuse extensively IPs that have been developed for bulk," he said. He added that a number of customers have turned to ST saying that they cannot afford to go FinFET manufacturing processes. "People using 28-nm CMOS bulk want an improvement but don’t want to go to 20-nm bulk CMOS or FinFETs," said Chery.

"We have two nodes – 28-nm and 14-nm – to build an ecosystem. And Globalfoundries sees a good future for this product for high volume, high complexity ICs. That's for things like low-cost smartphones and low-end tablets."

Chery said that while Globalfoundries is a good initial partner for the roll out of FDSOI the agreement is not an exclusive one. "We have a market share agreement with Globalfoundries," said Chery. "With IBM and as part of an extension to the ISDA [International Semiconductor Development Alliance] we have agreed the possibility to transfer the FDSOI to tier-two foundries, such as UMC and SMIC," he added. In June 2012 UMC (Hsinchu, Taiwan) announced it had signed a license agreement with IBM to support the development of 20-nm CMOS, including FinFET-style transistors.




Chery also discussed the announcement that ST would be offering phase-change memory as an embedded non-volatile memory option for some of its 90-nm microcontrollers. The technology is being prototyped at the 90-nm manufacturing node during 2013, said Chery had told analysts at the one-day conference on May 16.

"The 90-nm node is for us to prepare for 28-nm. NOR flash is not compatible with HKMG [high-K metal gate processes]," said Chery, referring to the details of 28-nm manufacturing process. He added that the current version of the PCM technology has some thermal limitations. "To keep performance after reflow [soldering of components] we need different material. We will be ready at 28-nm," he said.

For these reasons ST will offer PCM-based microcontrollers at 90-nm for secure and a general-purpose applications but not for automotive. At 40-nm NOR flash will continue to provide the non-volatile memory across all application categories before being replaced for all categories, including automotive, by PCM in about 2016 or 2017.

Chery told EE Times that while the initial embedded PCM introduction would be subject to thermal limitations the company is making progress on finding ternary mixes of elements that would have improved performance at high temperature.

Despite working on 90-nm as a development vehicle for an improved embedded-PCM at 28-nm, Chery said ST would be glad to supply samples to customers in 2014.


Related links and articles:

www.st.com

News articles:

ST turns to PCM for MCU embedded memory

FDSOI gains three design wins

Memory IP startup pursues FinFET, FDSOI processes

London Calling: FDSOI clocks at 3GHz

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